LS-DYNA MPP的基本架构与演进.pdf

节选段落一：
Jason Wang
Ansys Technology Conference
Sept. 17-18 2020
LS-DYNA/MPP 的
基本架构与演进
Outline
• LSDYNA/MPP Explicit Implementation
• HYBRID
• Dynamic Rebalance
• User Defined REDECOMP
LSDYNA/MPP Explicit Implementation
MPP (MIMD)
• Problem fits in real memory (in core)
• Element : internal force(CPU, memory


节选段落二：
16 MPP ranks
6 SMP threads
HYBRID
Telapse=Tcpu+Tsys+Tmpp+Tomp
SMP
SMP
SMP
SMP
SMP
SMP
SMP
SMP
MPP message
CPU core counts
SMP MPP HYBRID
1 16 512 5,000+
60M Solids FBO Erosion Improvement in LS-DYNA R8.0.0
0
2000
4000
6000
8000
10000
12000
14000
0 2000 4000 6000 8000 10000 12000 14000 16000 18000
W


节选段落三：
al
l T
im
e
(s
)
MPI ranks X 4 SMP threads
Parallel scaling of LS-DYNA in exp5 transient phase (0.2ms-0.3ms) on Cray
XC40
Elapsed
Element Prc
contact
Load Imbalance
32KPC
16KPC
8KPC
4KPC
Double sided FSW 600 RPM, 1200 mm/min(plastic work and friction energy to
heat)
Courtesy of Kirk A.